The Guides
Related Guides
The a cache in Guide
Geiger: Monitoring the Buffer Cache in a Virtual Machine Environment 
Secondary Cache Hit Ratio. The figure compares the cache hit ratio in a secondary storage cache for various workloads when demand ...
Secondary Cache Hit Ratio. The figure compares the cache hit ratio in a secondary storage cache for various workloads when demand ...
Effectively Sharing a Cache Among Threads
using p processors or threads and a shared cache of size Cp. We show that for any computation, ... In a shared-cache machine, multiple processors or concur- ...
using p processors or threads and a shared cache of size Cp. We show that for any computation, ... In a shared-cache machine, multiple processors or concur- ...
/Scratch as a Cache: Rethinking HPC Center Scratch Storage
approach is to re-design the scratch system as a “cache” and build “retention” and “eviction” ... ing the scratch as a cache captures the current HPC usage ...
approach is to re-design the scratch system as a “cache” and build “retention” and “eviction” ... ing the scratch as a cache captures the current HPC usage ...
Loading a Cache with Query Results
we load the cache of a system with relevant objects as a by- product of query processing. .... To see why loading the cache with query results is useful, ...
we load the cache of a system with relevant objects as a by- product of query processing. .... To see why loading the cache with query results is useful, ...
HAT-trie: A Cache-conscious Trie-based Data Structure for Strings
cient, the burst-trie was not designed to exploit cache; linked lists are not cache-conscious .... isting cache-oblivious data structures for our full pa- ...
cient, the burst-trie was not designed to exploit cache; linked lists are not cache-conscious .... isting cache-oblivious data structures for our full pa- ...
ADDRESSING CACHE IN AIRBORNE SYSTEMS AND EQUIPMENT
Many applicants utilize cache memory in microprocessors to accelerate the ... concerns and current approaches to addressing cache memory usage in airborne ...
Many applicants utilize cache memory in microprocessors to accelerate the ... concerns and current approaches to addressing cache memory usage in airborne ...
CASC: A Cache-Aware Scheduling Algorithm For Multithreaded Chip ...
threads that achieve low L2 cache miss rates. CASC uses a ..... L2 miss rate with a smaller cache. It would then use these ...
threads that achieve low L2 cache miss rates. CASC uses a ..... L2 miss rate with a smaller cache. It would then use these ...
The Collective: A Cache-Based System Management Architecture
the design and rationale for cache-based system manage- ment, as well as the detailed design ..... mand, our system also prefetches data into the cache. To ...
the design and rationale for cache-based system manage- ment, as well as the detailed design ..... mand, our system also prefetches data into the cache. To ...
